When the circuit is powered up, C2, R1 and C3, R3 generate a differential spike that resets the counter CD4518 and the D-type flip-flop CD4013. At this time, the Q of the D-type flip-flop is high, the triode is turned on, and the relay is closed. 4sV838 Electronic-Technical Data-Electronic Components-Circuit Diagram-Technology Application Website-Basic Knowledge-Principle-Maintenance-Action-Parameter-Electronic Component Symbol This timer is generated by 555 integrated circuit and resistor RA, RB, capacitor C, for 1 minute. The time base signal, after the 1/2CD4518 frequency division (10 frequency division), the next frequency divider is triggered by the falling edge of Q4A. At the same time, Q1A, Q2A, Q3A, Q4A output BCD code is sent to CD4511 seven-segment decoder to drive LED digital tube. When the counter receives the 100th pulse, Q1B, Q2B, Q3B, Q4B (0101), the NAND gate CD4011 outputs a falling pulse, which is inverted by the inverter and becomes a rising pulse, triggering CD4013 to make the circuit flip Q. Reverse is low. The relay is de-energized and the counter is naturally reset. The counter starts counting again, at which point the relay remains off and the relay will only pull in when the counter has filled 100 pulses. Therefore, this timer is energized for 100 minutes, and then powered off for 100 minutes, cycled back and forth. 4sV838 electronic-technical data-electronic components-circuit diagram-technology application website-basic knowledge-principle-maintenance-action-parameter-electronic component symbol because the time base signal here is 1 minute, so the LED digital tube displays the value exactly and delay The time coincides. If the time base signal is not an integer, the LED digital tube can only display the timing progress.
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