In the design, wiring is an important step to complete the product design. It can be said that the previous preparations are done for it. In the whole, the wiring design process has the highest limit, the finest skills, and the largest workload. Wiring includes single-sided wiring, double-sided wiring and multilayer wiring. There are also two ways of wiring: automatic wiring and interactive wiring. Before automatic wiring, you can use interactive to pre-wire the more stringent lines. The edges of the input end and the output end should be avoided adjacent to parallel to avoid reflection interference. If necessary, ground wire should be added for isolation. The wiring of two adjacent layers should be perpendicular to each other. Parasitic coupling is easy to occur in parallel.
The layout rate of automatic routing depends on a good layout. The routing rules can be preset, including the number of bending of the wiring, the number of vias, the number of steps, and so on. Generally, explore the warp wiring first, quickly connect the short wires, and then perform the labyrinth wiring. First, the wiring to be laid is optimized for the global wiring path. It can disconnect the laid wires as needed. And try to re-wire to improve the overall effect.
The current high-density design has felt that through-holes are not suitable. It wastes a lot of valuable wiring channels. In order to solve this contradiction, blind and buried-hole technologies have emerged, which not only fulfill the role of through-holes, It also saves a lot of wiring channels to make the wiring process more convenient, smoother and more complete. The board design process is a complex and simple process. To master it well, you need a large number of electronic engineering designers to go. Only when you experience it yourself can you get the true meaning of it.
1 Treatment of power supply and ground wire
Even if the wiring in the entire board is well completed, the interference caused by the improper consideration of the power supply and the ground wire will degrade the performance of the product and sometimes even affect the success rate of the product. Therefore, the wiring of the electric and ground wires must be taken seriously, and the noise interference generated by the electric and ground wires should be minimized to ensure the quality of the product.
Every engineer engaged in the design of electronic products understands the cause of the noise between the ground wire and the power wire, and now only the reduced noise suppression is described:
(1) It is well known to add a decoupling capacitor between the power supply and ground.
(2) Widen the width of the power supply and ground wire as much as possible, preferably the ground wire is wider than the power wire, their relationship is: ground wire "power wire" signal wire, usually the signal wire width is: 0.2 ~ 0.3mm, the most The slender width can reach 0.05～0.07mm, and the power cord is 1.2～2.5 mm. The wide ground wire of the digital circuit forms a loop, that is, a ground network is used (the ground of the analog circuit cannot be used in this way)
(3) Use a large area of ​​copper layer as the ground wire, and connect the unused places on the printed circuit board to the ground as the ground wire. Or it can be made into a multilayer board, and the power supply and ground wires occupy one layer each.
2 Common ground processing of digital circuit and analog circuit
Many circuits are no longer single-function circuits (digital or analog circuits), but are composed of a mixture of digital and analog circuits. Therefore, it is necessary to consider the mutual interference between them when wiring, especially the noise interference on the ground wire.
The frequency of the digital circuit is high, and the sensitivity of the analog circuit is strong. For the signal line, the high-frequency signal line should be as far away as possible from the sensitive analog circuit device. For the ground line, the whole person has only one node to the outside world, so it must The problem of digital and analog common ground is handled internally, and the digital ground and analog ground are actually separated inside the board. They are not connected to each other, but are connected to the outside world (such as plugs, etc.). There is a short connection between the digital ground and the analog ground. Please note that there is only one connection point. There are also non-shared land, which is determined by the system design.
3 When the signal line is laid on the electrical (ground) layer and the multilayer printed board is routed, there are not many wires left in the signal line layer that have not been laid out. Adding more layers will cause waste and increase production. The workload and cost have also increased accordingly. To solve this contradiction, you can consider wiring on the electrical (ground) layer. The power layer should be considered first, and the ground layer second. Because it is best to preserve the integrity of the formation.
4 Treatment of connecting legs in large area conductors
In large-area grounding (electricity), the legs of common components are connected to it. The treatment of the connecting legs needs to be considered comprehensively. In terms of electrical performance, it is better to connect the pads of the component legs to the copper surface. There are some undesirable hidden dangers in the welding assembly of components, such as: â‘ Welding requires high-power heaters. â‘¡It is easy to cause virtual solder joints. Therefore, both electrical performance and process requirements are made into cross-patterned pads, called heat shields, commonly known as thermal pads (Thermal), so that virtual solder joints may be generated due to excessive cross-section heat during soldering. Sex is greatly reduced. The processing of the power (ground) leg of the multilayer board is the same.
5 The role of the network system in cabling
In many CAD systems, wiring is determined by the network system. The grid is too dense and the path has increased, but the step is too small, and the amount of data in the field is too large. This will inevitably have higher requirements for the storage space of the device, and also the computing speed of the computer-based electronic products. Great influence. Some paths are invalid, such as those occupied by the pads of the component legs or by mounting holes and fixed holes. Too sparse grids and too few channels have a great impact on the distribution rate. Therefore, there must be a well-spaced and reasonable grid system to support the wiring.
The distance between the legs of standard components is 0.1 inches (2.54mm), so the basis of the grid system is generally set to 0.1 inches (2.54 mm) or an integral multiple of less than 0.1 inches, such as: 0.05 inches, 0.025 inches, 0.02 Inches etc.
6 Design Rule Check (DRC)
After the wiring design is completed, it is necessary to carefully check whether the wiring design conforms to the rules formulated by the designer, and it is also necessary to confirm whether the established rules meet the requirements of the printed board production process. The general inspection has the following aspects:
(1) Whether the distance between line and line, line and component pad, line and through hole, component pad and through hole, through hole and through hole is reasonable, and whether it meets the production requirements.
(2) Is the width of the power line and the ground line appropriate, and is the power supply and the ground line tightly coupled (low wave impedance)? Is there any place to widen the ground wire in the middle.
(3) Whether the best measures have been taken for the key signal lines, such as the shortest length, the protection line is added, and the input line and output line are clearly separated.
(4) Whether there are separate ground wires for the analog circuit and digital circuit part.
(5) Whether the graphics (such as icons, annotations) added in the later will cause signal short circuit.
(6) Modify some undesirable linear shapes.
(7) Is there a process line on the top? Whether the solder mask meets the requirements of the production process, whether the solder mask size is appropriate, and whether the character logo is pressed on the device pad, so as not to affect the quality of the electrical equipment.
(8) Whether the outer frame edge of the power ground layer in the multi-layer board is reduced, such as the copper foil of the power ground layer exposed outside the board, which may cause a short circuit.
The second layout
In design, layout is an important part. The result of the layout will directly affect the effect of the wiring, so it can be considered that a reasonable layout is the first step to a successful design.
There are two layout methods, one is interactive layout, and the other is automatic layout. Generally, interactive layout is used to adjust on the basis of automatic layout. During layout, the gate circuit can be reprocessed according to the wiring conditions. Allocation, the two gate circuits are exchanged, making it the best layout for easy wiring. After the layout is completed, the design file and related information can be returned and marked on the schematic diagram, so that the related information in the board is consistent with the schematic diagram, so that future file building and design changes can be synchronized, and at the same time, the simulation related information can be synchronized. The information is updated to enable board-level verification of the electrical performance and function of the circuit.
--Considering the overall beauty
The success of a product depends on the internal quality and the overall aesthetics. Only when both are perfect can the product be considered successful.
On a board, the layout of the components must be balanced, dense and orderly, and not top-heavy or heavy.
- Layout inspection
Does the size of the printed board match the size of the processing drawing? Can it meet the manufacturing process requirements? Are there any positioning marks?
Do components conflict in two-dimensional and three-dimensional space?
Is the layout of the components sparse and orderly and neatly arranged? Is it all finished?
Can the components that need to be replaced frequently be easily replaced? Is it convenient for the plug-in board to be inserted into the device?
Is there an appropriate distance between the thermal element and the heating element?
Is it convenient to adjust adjustable components?
Is a radiator installed in a place where heat dissipation is required? Is the air flow unobstructed?
Is the signal flow smooth and the interconnection shortest?
Does the plug, socket, etc. contradict the mechanical design?
Has the line interference problem been considered?
The third high-speed design
(1) Challenges faced by electronic system design
With the large-scale increase in system design complexity and integration, electronic system designers are engaged in circuit design above 100MHZ, and the operating frequency of the bus has reached or exceeded 50MHZ, and some even exceeded 100MHZ. At present, about 50% of the designs have a clock frequency of more than 50MHz, and nearly 20% of the designs have a clock frequency of more than 120MHz.
When the system works at 50MHz, there will be transmission line effects and signal integrity problems; and when the system clock reaches 120MHz, unless high-speed circuit design knowledge is used, designs based on traditional methods will not work. Therefore, high-speed circuit design technology has become a design method that electronic system designers must adopt. The controllability of the design process can only be achieved by using the design techniques of high-speed circuit designers.
(2) What is a high-speed circuit
It is generally believed that if the frequency of a digital logic circuit reaches or exceeds 45MHZ~50MHZ, and the circuit working above this frequency has taken up a certain share of the entire electronic system (for example, 1/3), it is called a high-speed circuit.
In fact, the harmonic frequency of the signal edge is higher than the frequency of the signal itself. It is the rising and falling edges of the signal (or signal jumps) that cause unexpected results in signal transmission. Therefore, it is generally agreed that if the line propagation delay is greater than 1/2 of the rise time of the digital signal driving end, such signals are considered to be high-speed signals and produce transmission line effects.
The transmission of the signal occurs at the instant when the signal state changes, such as the rise or fall time. The signal passes a fixed period of time from the driving end to the receiving end. If the transmission time is less than 1/2 of the rise or fall time, the reflected signal from the receiving end will reach the driving end before the signal changes state. Conversely, the reflected signal will reach the drive end after the signal changes state. If the reflected signal is strong, the superimposed waveform may change the logic state.
(3) Determination of high-speed signals
Above we have defined the preconditions for the occurrence of transmission line effects, but how do we know whether the line delay is greater than 1/2 the signal rise time of the drive end? Generally, the typical value of the signal rise time can be given in the device manual, and the signal propagation time is determined by the actual wiring length in the design. The following figure shows the corresponding relationship between the signal rise time and the allowable wiring length (delay).
The delay per unit inch on the board is 0.167ns. However, if there are many vias, many device pins, and many constraints set on the network cable, the delay will increase. Generally, the signal rise time of high-speed logic devices is about 0.2ns. If there are GaAs chips on the board, the maximum wiring length is 7.62mm.
Let Tr be the signal rise time and Tpd be the signal line propagation delay. If Tr≥4Tpd, the signal falls in a safe area. If 2Tpd≥Tr≥4Tpd, the signal falls in the uncertainty region. If Tr≤2Tpd, the signal falls in the problem area. For signals falling in uncertain areas and problem areas, high-speed wiring methods should be used.
(4) What is a transmission line
The traces on the board can be equivalent to the series and parallel capacitance, resistance and inductance structures shown in the figure below. The typical value of series resistance is 0.25-0.55 ohms/foot. Because of the insulating layer, the resistance of parallel resistance is usually very high. After adding parasitic resistance, capacitance and inductance to the actual connection, the final impedance on the connection is called the characteristic impedance Zo. The wider the wire diameter, the closer to the power/ground, or the higher the dielectric constant of the isolation layer, the smaller the characteristic impedance. If the impedance of the transmission line and the receiving end do not match, the output current signal and the final stable state of the signal will be different, which causes the signal to be reflected at the receiving end, and this reflected signal will be transmitted back to the signal transmitting end and reflected back again. As the energy decreases, the amplitude of the reflected signal will decrease until the voltage and current of the signal stabilize. This effect is called oscillation, and the oscillation of a signal can often be seen on the rising and falling edges of the signal.
(5) Transmission line effect
Based on the above-defined transmission line model, to sum up, the transmission line will bring the following effects to the entire circuit design.
? Reflected signals
? Delay & Timing errors
? False Switching for multiple times crossing the logic level threshold error
? Overshoot/Undershoot
? Induced Noise (or crosstalk)
? EMI radiaTIon
5.1 Reflected signal
If a trace is not properly terminated (terminal matching), then the signal pulse from the driving end is reflected at the receiving end, causing unexpected effects and distorting the signal profile. When the distortion is very significant, it can cause a variety of errors and cause design failure. At the same time, the susceptibility of the distorted signal to noise increases, which can also cause design failure. If the above situation is not considered enough, EMI will increase significantly, which will not only affect the results of its own design, but also cause the failure of the entire system.
The main reasons for the reflected signal are: too long traces; transmission lines that are not terminated by matching, excessive capacitance or inductance, and impedance mismatch.
5.2 Delay and timing errors
Signal delay and timing errors are manifested as: the signal does not jump for a period of time when the signal changes between the high and low thresholds of the logic level. Excessive signal delay may cause timing errors and confusion of device functions.
Problems usually arise when there are multiple receivers. The circuit designer must determine the worst-case time delay to ensure the correctness of the design. The reason for the signal delay: the driver is overloaded, and the wiring is too long.
5.3 Multiple times of crossing the logic level threshold error
The signal may cross the logic level threshold many times during the transition process, resulting in this type of error. The error of crossing the logic level threshold multiple times is a special form of signal oscillation, that is, the oscillation of the signal occurs near the logic level threshold, and crossing the logic level threshold multiple times will cause the logic function disorder. Causes of reflected signals: long traces, unterminated transmission lines, excessive capacitance or inductance, and impedance mismatch.
5.4 Overshoot and undershoot
Overshoot and undershoot are due to two reasons: the trace is too long or the signal changes too fast. Although most component receiving ends are protected by input protection diodes, sometimes these overshoot levels will far exceed the component power supply voltage range and damage components.
5.5 Crosstalk
Crosstalk is manifested as when a signal passes through a signal line, related signals will be induced on the signal line adjacent to it on the board, which we call crosstalk.
The closer the signal line is to the ground, the greater the line spacing, and the smaller the crosstalk signal generated. Asynchronous signals and clock signals are more prone to crosstalk. Therefore, the method of crosstalk is to remove the crosstalk signal or shield the signal that is seriously interfered.
5.6 Electromagnetic radiation
EMI (Electro-MagneTIc Interference) refers to electromagnetic interference. The problems caused include excessive electromagnetic radiation and susceptibility to electromagnetic radiation. EMI is manifested in that when a digital system is powered on, it will radiate electromagnetic waves to the surrounding environment, thereby interfering with the normal operation of electronic equipment in the surrounding environment. The main reason for it is that the operating frequency of the circuit is too high and the layout is unreasonable. There are software tools for EMI simulation, but EMI simulators are very expensive, and it is difficult to set simulation parameters and boundary conditions, which will directly affect the accuracy and practicability of the simulation results. The most common approach is to apply the various design rules for controlling EMI in every aspect of the design, so as to realize the rule-driven and control in every aspect of the design.
(6) Methods to avoid transmission line effects
In view of the influences introduced by the above transmission line problems, let's talk about the methods to control these influences from the following aspects.
6.1 Strictly control the length of key network cables
If there is a high-speed transition edge in the design, it must be considered that there is a transmission line effect on the board. Fast integrated circuit chips with very high clock frequencies that are commonly used nowadays have such problems. There are some basic principles to solve this problem: if CMOS or TTL circuits are used for design, the operating frequency is less than 10MHz, and the wiring length should not be greater than 7 inches. The wiring length should not be greater than 1.5 inches at 50MHz. If the operating frequency reaches or exceeds 75MHz, the wiring length should be 1 inch. The maximum wiring length for GaAs chips should be 0.3 inches. If it exceeds this standard, there will be transmission line problems.
6.2 Reasonably plan the topology of the wiring
Another way to solve the transmission line effect is to select the correct wiring path and terminal topology. The topological structure of the wiring refers to the wiring sequence and wiring structure of a network cable. When using high-speed logic devices, unless the length of the trace branch is kept short, signals with rapidly changing edges will be distorted by the branch traces on the signal trunk trace. Under normal circumstances, wiring uses two basic topologies, namely daisy chain (Daisy Chain) wiring and star (Star) distribution.
For daisy chain wiring, the wiring starts from the driving end and reaches each receiving end in turn. If a series resistance is used to change the signal characteristics, the position of the series resistance should be close to the drive end. In terms of controlling the high-order harmonic interference of the wiring, the daisy chain wiring has the best effect. However, this wiring method has the lowest distribution rate, and it is not easy to distribute 100%. In the actual design, we make the branch length in the daisy chain wiring as short as possible, and the safe length value should be: Stub Delay <<= Trt *0.1.
For example, the length of the branch end in a high-speed TTL circuit should be less than 1.5 inches. This topology occupies less wiring space and can be terminated with a single resistor. However, this wiring structure makes the reception of signals at different signal receiving ends asynchronous.
The star topology structure can effectively avoid the asynchronous problem of the clock signal, but it is very difficult to manually complete the wiring on the board with high density. Using an automatic router is the best way to complete star wiring. Terminating resistors are required on each branch. The resistance of the terminal resistor should match the characteristic impedance of the connection. This can be calculated manually or by CAD tools to calculate the characteristic impedance value and the terminal matching resistance value.
In the above two examples, simple terminal resistors are used. In practice, more complex matching terminals can be selected. The first option is RC matching terminal. The RC matching terminal can reduce power consumption, but it can only be used when the signal is relatively stable. This method is most suitable for matching the clock line signal. The disadvantage is that the capacitance in the RC matching terminal may affect the shape and propagation speed of the signal.
The series resistance matching terminal will not produce additional power consumption, but will slow down the signal transmission. This method is used for bus drive circuits where the time delay has little effect. The advantage of the series resistance matching terminal is that it can reduce the number of on-board devices and the density of wiring.
The last method is to separate the matching terminal. In this way, the matching component needs to be placed near the receiving end. The advantage is that it will not pull down the signal, and noise can be avoided very well. Typically used for TTL input signals (ACT, HCT, FAST).
In addition, the package type and installation type of the terminal matching resistor must also be considered. Generally, SMD surface mount resistors have lower inductance than through-hole components, so SMD packaged components become the first choice. If you choose ordinary in-line resistors, there are also two options for installation: vertical and horizontal.
In the vertical installation mode, one mounting pin of the resistor is very short, which can reduce the thermal resistance between the resistor and the circuit board, so that the heat of the resistor can be more easily dissipated into the air. But a longer vertical installation will increase the inductance of the resistor. Horizontal installation has lower inductance due to lower installation. However, the overheated resistance will drift. In the worst case, the resistance will become an open circuit, causing the termination of the trace to fail and become a potential failure factor.
6.3 Methods to suppress electromagnetic interference
A good solution to the signal integrity problem will improve the electromagnetic compatibility (EMC) of the board. One of the most important is to ensure that the board is well grounded. It is very effective to use a signal layer with a ground layer for complex designs. In addition, minimizing the signal density of the outermost layer of the circuit board is also a good way to reduce electromagnetic radiation. This method can be realized by using the "surface area layer" technology "Build-up" design and manufacture. The surface area layer is realized by adding a combination of a thin insulating layer and micro-holes used to penetrate these layers in a common process. The resistance and capacitance can be buried under the surface layer, and the trace density per unit area will be nearly doubled, thus reducing volume of. The reduction in area has a huge impact on the topology of the trace, which means that the current loop is reduced, the length of the branch trace is reduced, and the electromagnetic radiation is approximately proportional to the area of ​​the current loop; at the same time, the small size feature means high-density pins Packaged devices can be used, which in turn reduces the length of the wire, thereby reducing the current loop and improving the electromagnetic compatibility characteristics.
6.4 Other applicable technologies
In order to reduce the instantaneous overshoot of the voltage on the power supply of the integrated circuit chip, a decoupling capacitor should be added to the integrated circuit chip. This can effectively remove the effects of burrs on the power supply and reduce the radiation of the power loop on the printed board.
When the decoupling capacitor is directly connected to the power tube leg of the integrated circuit instead of the power layer, the effect of smoothing the burr is best. This is why some device sockets have decoupling capacitors, and some devices require the distance between the decoupling capacitor and the device to be small enough.
Any high-speed and high-power devices should be placed together as much as possible to reduce the transient overshoot of the power supply voltage.
If there is no power layer, the long power connection will form a loop between the signal and the loop, becoming a radiation source and a sensitive circuit.
The situation where the traces form a loop that does not cross the same network cable or other traces is called an open loop. If the loop passes through other wires of the same network cable, it constitutes a closed loop. In both cases, antenna effects (wire antennas and loop antennas) are formed. The antenna generates EMI radiation externally and is also a sensitive circuit itself. The closed loop is a problem that must be considered, because the radiation it generates is approximately proportional to the closed loop area.
Concluding remarks
High-speed circuit design is a very complex design process. ZUKEN's high-speed circuit routing algorithm (Route Editor) and EMC/EMI analysis software (INCASES, Hot-Stage) are used to analyze and find problems. The method described in this article is specifically aimed at solving these high-speed circuit design problems. In addition, there are multiple factors that need to be considered when designing high-speed circuits, and these factors are sometimes opposed to each other. For example, when high-speed devices are placed close to each other, although the delay can be reduced, crosstalk and significant thermal effects may occur. Therefore, in the design, it is necessary to weigh various factors and make a comprehensive compromise; not only meet the design requirements, but also reduce the design complexity. The use of high-speed design means constitutes the controllability of the design process. Only controllable can be reliable and successful!
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