In the previous article of the SDSoC series, we have introduced how to build a Hardware and software platform in SDSoC, and use the SDSPFM tool to generate a customer application development platform (see "SDSoC development start: building hardware and software platforms"). If you have completed the above work, congratulations-now you can officially "start" to develop your own application based on SDSoC on Zynq SoC!
A typical SDSoC design and development process includes the following steps:
The user defines the target platform required to develop the application.
Users design and verify algorithms based on C / C ++.
The user determines the performance bottleneck according to the system feature description, and then partitions the software and hardware.
SDSoC will automatically execute those functions accelerated by PL (programmable logic), other functions remain in PS (processor system).
SDSoC will also automatically generate the connection between software / hardware and DataMover logic to connect the functions in PL and PS.
If the final result does not meet the design requirements, developers can re-partition software and hardware functions to explore the optimal system architecture.
Figure 1. Typical development process of SDSoC (Image source: Xilinx)
That's right, using SDSoC for application development is just a few simple steps. The content of our article can be completely closed here.
However, we still hope to compare the current "simple" design flow with the traditional "not simple" design flow of programmable logic, so that everyone can deeply understand what SDSoC has done for you?
The so-called "no harm without comparison", the traditional Zynq SoC development process is complicated like this-first, the system architecture engineer partitions the software and hardware, that is, to determine which functions are put into PL (programmable logic) for hardware acceleration , Which functions are implemented in software in PS (processor system);
Next, the hardware engineer generates the IP to be accelerated in the PL based on Vivado and builds the hardware platform, and also completes the connection between the software / hardware, configures the interface between the PS and PL, etc .; then imports the hardware platform data into the SDK , The software engineer completes the development of the supporting driver and application program. It can be seen that the traditional design process requires the intervention of many teams and resources, which is not simple.
If after completing the above design work, it is found that the system architecture still needs to be optimized, this is a sad reminder-the design has to readjust the software and hardware partitions, and the above entire development process must be repeated again, and in many cases, multiple iterations are required. Find that satisfactory system architecture and solution. The time and resources thus consumed are enormous and even uncontrollable.
Figure 2. Traditional FPGA SoC application development process (Image source: Xilinx)
After using SDSoC, a lot of work is done automatically by the tool: tedious manual work such as software driver and hardware connection is omitted, and the C / C ++ terminal application can be used to input and call the user algorithm IP like a function call; only a single With one click, you can complete the partition settings to determine the functions that need to be run in the programmable logic.
Figure 3. Simplified FPGA SoC application development process using SDSoC (Image source: Xilinx)
To make a metaphor that is not very accurate: the difference between SDSoC and traditional tools and development processes is like the difference between automatic transmission and manual transmission. It makes complex work "transparent" to users and allows users to actually "operate" It becomes simpler, and the energy liberated by the user can be used to think about more advanced questions such as "Where to go and how to go", instead of competing with "Liu Li".
Analogy to the application development of FPGA SoC, the most concerned part of the user is often the final implementation of the algorithm and the optimization of the algorithm module-including IP or software function blocks-the design concept of SDSoC is to allow users to focus more on these cores Questions, other questions SDSoC helps you deal with it. In this sense, SDSoC is indeed not simple behind "simple".
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